Introduction to VHDL

Introduction to VHDL

VHDL is a programming language that is used to design and optimize behavior of digital circuits and systems. Different attributes of VHDL describe the behavior of electronic components starting from simple logic gates to finish microprocessors and custom chips. VHDL is a powerful language which can be easily simulated to design complex electronics circuit
For design specification
VHDL are mostly recommended when you're still designing at a high level, to capture the performance and interface requirements of every component during a large system. This is particularly useful for giant projects involving many team members. Using a top-down approach to style , a system designer may define the interface to every component within the system, and describe the acceptance requirements of these components within the form of a high-level test bench.
For design simulation
we mostly use computer based design system, to simulate the operation of your circuit to seek out  if it'll meet the functional and timing requirements developed during the specification process. If you've got created one or more test benches as a neighborhood of your design specification, then you'll use a simulator to use the test bench to your design because it is written for synthesis (a functional simulation) and possibly using the post-synthesis version of the planning also .